Arm Cortex A55 Model


The Cortex-A55 processor is Arm's most efficient application processor ever, delivering today's mainstream smartphone experience in a quarter of the power in the respective process nodes. The Cortex-A55 model includes the DynamIQ Shared Unit (DSU).

DSU r0p2 supports Cortex-A55 r1p0.
DSU r0p1 supports Cortex-A55 r0p1.

SoC DesignerSystemC ModelSynopsys PA
Cortex A55 Cycle Model
Description The Cortex A55 model is compiled directly from Arm's register transfer level (RTL) code and maintains 100% functional accuracy. The model integrates directly with Arm's SoC Designer virtual prototype. This enables designers to perform accurate architectural analysis, performance optimization and pre-silicon firmware debug.
Performance Analysis Kits
Revisions r0p2, r0p1
IP Link Documentation
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