Arm DynamIQ Crypto Model
Description
The DynamIQ allows compatible cores to be integrated into a multicore
system.
The DynamIQ integrates 1 to 8 cores with an L3 memory system, control logic, and external interfaces
to form a multicore cluster.
The DynamIQ Crypto Model allows for up to 4 Big and up to 8 Little core (both with Crypto Extentions) to be configured into a multicore model which includes the DynamIQ Shared Unit (DSU).
The Cortex-A55 Little CPU is supported and the Cortex-A75 Big CPU is supported.
DSU r0p2 supports Cortex-A55 r1p0 and Cortex-A75 r2p0.
DSU r0p1 supports Cortex-A55 r0p1 and Cortex-A75 r1p0.